Dataram DTM65525B Datasheet download pdf (Page 13)

DTM65525B

2 GB, 240-Pin DDR2 FB-DIMM

SERIAL PRESENCE DETECT MATRIX

Byte# Function. Value Hex

0 Number of Serial PD Bytes Written / SPD Device Size / CRC Coverage 0x92

Bit 3 ~ Bit 0. SPD Bytes Used - 176

Bit 6 ~ Bit 4. SPD Bytes Total - 256

Bit 7. CRC Coverage - Bytes 0-116

1 SPD Revision Rev. 1.1 0x11

2 Key Byte / DRAM Device Type DDR2 FBDIMM 0x09

3 Voltage Levels of this Assembly 0x12

Bit 3 ~ Bit 0. Power Supply 1 - 1.5V

Bit 7 ~ Bit 4. Power Supply 2 - 1.8V

4 SDRAM Addressing 0x45

Bit 1, 0. Number of Banks - 8

Bit 5 ~ Bit 3.Column Address Bits - 10

Bit 7 ~ Bit 5. Row Address Bits - 14

5 Module Physical Attributes 0x23

Bit 3 ~ Bit 0. Module Thickness (mm) - 7<x<=8.0

Bit 4 ~ Bit 2. Module Height (mm) - 30<x<=35

Bit 7, 6. Reserved 0

6 Module Type 0x07

Bit 3 ~ Bit 0. Module Type - FB-DIMM

Bit 7 ~ Bit 4. Reserved 0

7 Module Organization 0x11

Bit 3 ~ Bit 0. SDRAM Device Width - 8-Bits

Bit 5 ~ Bit 3. Number of Ranks - 2-Rank

Bit 7, 6. Reserved 0

8 Fine Timebase Dividend / Divisor 0x00

Bit 3 ~ Bit 0. Fine Timebase (FTB) Dividend - 0

Bit 7 ~ Bit 4. Fine Timebase (FTB) Divisor - 0

9 Medium Timebase Dividend. 1 (MTB =

0.25ns)

0x01

10 Medium Timebase Divisor. 4 (MTB =

0.25ns)

0x04

11 SDRAM Minimum Cycle Time (tCKmin). 2.5ns 0x0A

12 SDRAM Maximum Cycle Time (tCKmax). 8.0ns 0x20

13 SDRAM CAS Latencies Supported. 0x24

Bit 3 ~ Bit 0. Minimum CL (clocks) - 4

Bit 7 ~ Bit 4. CL Range (clocks) - 2

14 SDRAM Minimum CAS Latency Time (tAAmin). 12.5ns 0x32

15 SDRAM Write Recovery Times Supported 0x32

Bit 3 ~ Bit 0. Minimum WR (clocks) - 2

Bit 7 ~ Bit 4. WR Range (clocks) - 3

16 SDRAM Write Recovery Time (tWR). 15.0ns 0x3C

17 SDRAM Write Latencies Supported 0x42

1 2 ... 8 9 10 11 12 13 14 15 16 17 18

DTM65525B 1

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