Dataram DTM65525B Datasheet Page 10

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DTM65525B
2 GB, 240-Pin DDR2 FB-DIMM
Document 06530, Revision A, 20-Apr-09, Dataram Corporation © 2009 Page 10
AMB Power Specification (T
A
= 0 to 70 C, Voltage referenced to V
SS
= 0V)
Parameter
Symbol Test Condition
Power
Supply
Value Unit
1.5 V 2600
Idle
Current
IDD_IDLE_0
Single or last FBDIMM: L0 state, idle (0 BW); primary channel
enabled, secondary channel disabled, CKE high; command and
address lines stable, DDR2 SDRAM clock active.
1.8 V 700
mA
1.5 V 3400
Idle
Current
IDD_IDLE_1
First FBDIMM: L0 state, idle (0 BW); primary and secondary
channels enabled, CKE high; command and address lines
stable, DDR2 SDRAM clock active.
1.8 V 700
mA
1.5 V 3000
Active
Power
IDD_TDP_0
TDP BW, Single or Last DIMM; L0 State; TDP Channel
BW=2.4GB/s@667, 67% READ, 33% WRITE; primary channel
enabled; secondary channel disabled, CKE high; command and
address lines stable, DDR2 SDRAM clock active.
1.8 V 1300
mA
1.5 V 3900
Active
Power
IDD_TDP_1
TDP BW, First DIMM; L0 State; TDP Channel
BW=2.4GB/s@667, DIMM BW=1.6GB/s@667; 67% READ, 33%
WRITE; primary channel enabled; secondary channel enabled,
CKE high; command and address lines stable, DDR2 SDRAM
clock active.
1.8 V 1000
mA
1.5 V 4000
Training
IDD_TRAINING
Primary and secondary channels enabled; 100% toggle on all
channel lanes; DDR2 SDRAM devices idle (0 BW); CKE HIGH,
command and address lines stable; DDR2 SDRAM clock active.
1.8 V 0.7
mA
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