DTM65525B
2 GB, 240-Pin DDR2 FB-DIMM
Document 06530, Revision A, 20-Apr-09, Dataram Corporation © 2009 Page 15
Standby (DT2N/DT2Q). °C
37 SDRAM Case Temperature Rise from Ambient due to Precharge
Power-Down (DT2P). °C
1.095 0x49
38 SDRAM Case Temperature Rise from Ambient due to Active
Standby (DT3N). °C
6 0x28
39 SDRAM Case Temperature Rise from Ambient due to Page Open Burst
Read/DT4R4W Mode Bit (DT4R/DT4R4W Mode Bit).
0x5E
Bit 0. DT4R4W Mode Bit, Subfield B: 0.4 °C 0
Bit 7 ~ Bit 1. DT4R, Subfield A: 0.4 °C - 18.8
40 SDRAM Case Temperature Rise from Ambient due to Burst
Refresh (DT5B). °C
19.5 0x27
41 SDRAM Case Temperature Rise from Ambient due to Bank
Interleave Reads with Auto-Precharge (DT7). °C
20.5 0x29
42-74 Reserved UNUSED 0x00
75 QR Control. 0x00
76 QR ODT control for Rank 0 and rank 1 Reads and writes. 0x00
77 QR ODT1 and ODT2 control for reads. 0x00
78 FBD ODT Definition for Rank 2 and 3 0x00
Bit 1, Bit 0. Rank 2 Data DRAM ODT - Disabled
Bit 3, Bit 2. Rank 2 Ecc DRAM ODT - Disabled
Bit 5, Bit 4. Rank 3 Data DRAM ODT - Disabled
Bit 7, Bit 6. Rank 3 Ecc DRAM ODT - Disabled
79 FBD ODT Definition for Rank 0 and 1 0x22
Bit 1, Bit 0. Rank 0 Data DRAM ODT - 150 Ohms
Bit 3, Bit 2. Rank 0 Ecc DRAM ODT - Disabled
Bit 5, Bit 4. Rank 1 Data DRAM ODT - 150 Ohms
Bit 7, Bit 6. Rank 1 Ecc DRAM ODT - Disabled
80 Reserved UNUSED 0x00
81 Channel Protocols Supported, Least Significant Byte 0x02
Bit 0, DDR2 Base Non-ECC Protocol - 0-Not Supported
Bit 1. DDR2 Base ECC Protocol - 1-Supported
Bit 7 ~ Bit 2. TBD 0
82 Channel Protocols Supported, Most Significant Byte UNUSED 0x00
83 Back-to-back Turnaround Cycles 0x10
Bit 1, Bit 0. Rank Read-to-Read - 0 add-l clock
Bit 3, Bit 2. Write-to-Read - 0 add-l clock
Bit 5, Bit 4. Read-to-Write - 1 add-l clock
Bit 7, Bit 6. TBD 0
84 AMB Read Access Time for DDR2-800 (AMB.LINKPARNXT[1:0] = 11) 0x36
Bit 3 ~ Bit 0. Read Access Fine Granularity (UI) 6
Bit 7 ~ Bit 4. Read Access Coarse Granularity (tCK) 3
85 AMB Read Access Time for DDR2-667 (AMB.LINKPARNXT[1:0] = 10) 0x34
Bit 3 ~ Bit 0. Read Access Fine Granularity (UI) 4
Bit 7 ~ Bit 4. Read Access Coarse Granularity (tCK) 3
86 AMB Read Access Time for DDR2-533 (AMB.LINKPARNXT[1:0] = 01) 0x32
Bit 3 ~ Bit 0. Read Access Fine Granularity (UI) 2
Bit 7 ~ Bit 4. Read Access Coarse Granularity (tCK) 3
(11 pages)
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